Multi-master multi-slave system bus in a field pro

专利名称：Multi-master multi-slave system bus in a

field programmable gate array (FPGA)

发明人：Barry K. Britton,Ravikumar Charath,Zheng

Chen,James F. Hoff,Cort D.

Lansenderfer,Don McCarley,Richard G.Stuby, Jr.,Ju-Yuan D. Yang

申请号：US09864277申请日：20010525公开号：US06483342B2公开日：20021119

专利附图：

摘要：An embedded system bus is woven between a plurality of embedded masterelements and at least one slave element within the FPGA device, and provides an externalprocessor interface allowing direct access to any of the plurality of embedded slaveelements. Using the embedded system bus, any of a plurality of masters may be allowedto program an embedded element, e.g., embedded FPGA logic, whereas conventionalFPGAs allowed only a single master (e.g., a processor) to program the embedded FPGAlogic. The embedded system bus is a group of signals, typically data, address and control,that connects system elements together and provides a basic protocol for the flow ofdata. The embedded system bus allows for control, configuration and status

determination of the FPGA device. The embedded system bus is preferably a dedicatedfunction available at all times for arbitrated access to allow communication between thevarious embedded system components.

申请人：LATTICE SEMICONDUCTOR CORPORATION

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